October 3, 2012
10.00 - 11.30
Session 1 : MIPI & Application Processor Interfaces, Lumière Amphi
Chairman: Joël Huloux, STMicroelectronics
An Overview of high performance new MIPI interfaces
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10:00: New MIPI protocols : Unipro, LLI and CSI3 over MPHY, Gabriele Zarri, Moshik Rubin, Cadence, Sophia Antipolis, France
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10:30: LLI specification and implementation challenges, Philippe Martin, Arteris, Guyancourt, France
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11:00: M-PHY : a versatile PHY for Mobile Devices, Patrick Mone, Texas Instruments
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10.00 - 11.30
Session 2 : RF Design, Edison Amphi
Chairman: Lorenzo Carpineto, SDRF
Theory, study and implemantation of frequency synthesizers
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10.00: A Phase Noise Performance Study of 15 GHz Phase Locked Loop in 130nm CMOS Technology for DVB-S Application
Alessandro Magnani, University of Modena and Reggio Emilia (Modena, Italy),
University Paul Sabatier (Toulouse, France)
Paolo Lucchi, UMS (Paris, France)
Thierry Parra, University Paul Sabatier (Toulouse, France)
Mattia Borgarino, University of Modena and Reggio Emilia (Modena, Italy)
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10.30: Event-Driven simulation of the 2nd order voltage operated charge-pump pll : Ehsan Ali, Christian Hangmann, Christopher Wiegand, Christian Hedayat and Dieter Kraus, Fraunhofer ENAS, Department of Advanced System Engineering, Paderborn ; Paderborn University, Department of Sensor Technology, Paderborn ; Hochschule Bremen, University of Applied Sciences, Bremen, Germany
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11.00: Implementation of phase noise theories for transient simulations, Cerasani Umberto (Leat), William Tatinian (Leat)
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13.30 - 15.00
Session 3: Advanced Design methodologies, Lumiere Amphi
Chairman: Laurent Thenie, Cadence
Innovations addressing the challenges of highly complex systems design.
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13.30: Best FPGA design practices to comply with new standards while reducing field failures, Shakeel Jeeawoody, Blue Pearl Software - Santa Clara, USA et Erik Hochapfel, ADACSYS - Palaiseau, France
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14.00 : Enabling Tools for virtual platforms, Davide Quaglia, Franco Fummi University of Verona / EDALab s.r.l. Verona, Italy
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14.30 : ST 20NM Constraint Driven and Modgen Flow, François Lemery, Cadence
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16:15 – 18:15
Session 4 : Packaging Solutions, Lumière Amphi
Chairman: Vladimir Papic
Package design : a complex bridge between deep submicron ICs and advanced board designs
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16:15: Package On Package (POP), Jean-François Drouard, Texas Instruments, France
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16:55 : Requirements of mobile applications and their effect on package technologies, Marc Dittes, Intel, Regensburg, Germany
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17:25: Technology details on TSV solutions and its practical use in CERN’s ATLAS experiment (high speed sensor for LHC collider), Torsten Krause-Dukart, EquipIC supply chain
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17:45: Advanced Packaging Technology for RF, Jean-François Maman et El Hassani Chakib, INSIGHT-SIP
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16:15 – 18:15
Session 5 : Multiprocessing HW/SW, Edison Amphi
Chairman: Cédric Hottier, STMicroelectronics
The benefits and challenges of HW-SW co-design
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16:15 : ARM big.LITTLE System Architecture: Saving Power through Heterogeneous Multiprocessing and Context Migration, John Goodacre, ARM
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16:45 : Software parallelization and platform generation for heterogeneous multicore architectures, Sven Wuytack, Erik Brockmeyer, Wouter Vermaelen, Gert Goossens, Target Compiler Technologies, Leuven, Belgium
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17:15: Recent Experience on an ESL Framework for Rapid Design Exploration using Hardware-Software Codesign for ARM based FPGAs, Laurent Moss, Hubert Guérard, Gary Dare, Guy Bois, Space Codesign Systems Inc., Canada
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17:45: Metric Driven Co-Verification of Interrupt and IPC Drive Firmware Sub-Systems, François Cerisier, Test and Verification Solutions, France, Markus Winterhöler, Cadence, Germany
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